

#ifndef _CLOCK_BCM_CYGNUS_H
#define _CLOCK_BCM_CYGNUS_H


#define BCM_CYGNUS_GENPLL                     0
#define BCM_CYGNUS_GENPLL_AXI21_CLK           1
#define BCM_CYGNUS_GENPLL_250MHZ_CLK          2
#define BCM_CYGNUS_GENPLL_IHOST_SYS_CLK       3
#define BCM_CYGNUS_GENPLL_ENET_SW_CLK         4
#define BCM_CYGNUS_GENPLL_AUDIO_125_CLK       5
#define BCM_CYGNUS_GENPLL_CAN_CLK             6


#define BCM_CYGNUS_LCPLL0                     0
#define BCM_CYGNUS_LCPLL0_PCIE_PHY_REF_CLK    1
#define BCM_CYGNUS_LCPLL0_DDR_PHY_CLK         2
#define BCM_CYGNUS_LCPLL0_SDIO_CLK            3
#define BCM_CYGNUS_LCPLL0_USB_PHY_REF_CLK     4
#define BCM_CYGNUS_LCPLL0_SMART_CARD_CLK      5
#define BCM_CYGNUS_LCPLL0_CH5_UNUSED          6


#define BCM_CYGNUS_MIPIPLL                    0
#define BCM_CYGNUS_MIPIPLL_CH0_UNUSED         1
#define BCM_CYGNUS_MIPIPLL_CH1_LCD            2
#define BCM_CYGNUS_MIPIPLL_CH2_V3D            3
#define BCM_CYGNUS_MIPIPLL_CH3_UNUSED         4
#define BCM_CYGNUS_MIPIPLL_CH4_UNUSED         5
#define BCM_CYGNUS_MIPIPLL_CH5_UNUSED         6


#define BCM_CYGNUS_ASIU_KEYPAD_CLK    0
#define BCM_CYGNUS_ASIU_ADC_CLK       1
#define BCM_CYGNUS_ASIU_PWM_CLK       2


#define BCM_CYGNUS_AUDIOPLL           0
#define BCM_CYGNUS_AUDIOPLL_CH0       1
#define BCM_CYGNUS_AUDIOPLL_CH1       2
#define BCM_CYGNUS_AUDIOPLL_CH2       3

#endif 
